Based on kernel version 7.3. Page generated on 2026-10-19 13:17 EDT.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/eswin,eic7700-hspcrg.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: ESWIN EIC7700 HSP Clock and Reset Generator maintainers: - Xuyang Dong <dongxuyang@eswincomputing.com> description: Clock and reset generator for the ESWIN EIC7700 HSP (high-speed peripherals). properties: compatible: const: eswin,eic7700-hspcrg reg: maxItems: 1 clocks: items: - description: HSP configuration top clock - description: MMC top clock - description: SATA top clock clock-names: items: - const: cfg - const: mmc - const: sata '#clock-cells': const: 1 description: See <dt-bindings/clock/eswin,eic7700-hspcrg.h> for valid indices. '#reset-cells': const: 1 description: See <dt-bindings/reset/eswin,eic7700-hspcrg.h> for valid indices. required: - compatible - reg - clocks - clock-names - '#clock-cells' - '#reset-cells' additionalProperties: false examples: - | clock-controller@50440000 { compatible = "eswin,eic7700-hspcrg"; reg = <0x50440000 0x2000>; clocks = <&clock 171>, <&clock 254>, <&clock 187>; clock-names = "cfg", "mmc", "sata"; #clock-cells = <1>; #reset-cells = <1>; }; |