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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/raspberrypi,rp1-clocks.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: RaspberryPi RP1 clock generator maintainers: - A. della Porta <andrea.porta@suse.com> description: | The RP1 contains a clock generator designed as three PLLs (CORE, AUDIO, VIDEO), and each PLL output can be programmed through dividers to generate the clocks to drive the sub-peripherals embedded inside the chipset. Link to datasheet: https://datasheets.raspberrypi.com/rp1/rp1-peripherals.pdf properties: compatible: const: raspberrypi,rp1-clocks reg: maxItems: 1 '#clock-cells': const: 1 description: The available clocks are defined in include/dt-bindings/clock/raspberrypi,rp1-clocks.h. clocks: maxItems: 1 required: - compatible - reg - '#clock-cells' - clocks additionalProperties: false examples: - | #include <dt-bindings/clock/raspberrypi,rp1-clocks.h> rp1 { #address-cells = <2>; #size-cells = <2>; clocks@c040018000 { compatible = "raspberrypi,rp1-clocks"; reg = <0xc0 0x40018000 0x0 0x10038>; #clock-cells = <1>; clocks = <&clk_rp1_xosc>; }; }; |