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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/intel,easic-n5x.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Intel SoCFPGA eASIC N5X platform clock controller maintainers: - Dinh Nguyen <dinguyen@kernel.org> description: The Intel eASIC N5X Clock controller is an integrated clock controller, which generates and supplies to all modules. properties: compatible: const: intel,easic-n5x-clkmgr '#clock-cells': const: 1 reg: maxItems: 1 clocks: maxItems: 1 required: - compatible - reg - clocks - '#clock-cells' additionalProperties: false examples: # Clock controller node: - | clkmgr: clock-controller@ffd10000 { compatible = "intel,easic-n5x-clkmgr"; reg = <0xffd10000 0x1000>; clocks = <&osc1>; #clock-cells = <1>; }; ... |