Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: LPASS Always ON Clock Controller on SM8250 SoCs maintainers: - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> description: | The clock consumer should specify the desired clock by having the clock ID in its "clocks" phandle cell. See include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h for the full list of Audio Clock controller clock IDs. properties: compatible: const: qcom,sm8250-lpass-aoncc reg: maxItems: 1 '#clock-cells': const: 1 clocks: items: - description: LPASS Core voting clock - description: LPASS Audio codec voting clock - description: Glitch Free Mux register clock clock-names: items: - const: core - const: audio - const: bus required: - compatible - reg - '#clock-cells' - clocks - clock-names additionalProperties: false examples: - | #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h> #include <dt-bindings/sound/qcom,q6afe.h> clock-controller@3800000 { #clock-cells = <1>; compatible = "qcom,sm8250-lpass-aoncc"; reg = <0x03380000 0x40000>; clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; clock-names = "core", "audio", "bus"; }; |