Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/qcom,camcc-sm8250.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Camera Clock & Reset Controller on SM8250 maintainers: - Jonathan Marek <jonathan@marek.ca> description: | Qualcomm camera clock control module provides the clocks, resets and power domains on SM8250. See also:: include/dt-bindings/clock/qcom,camcc-sm8250.h allOf: - $ref: qcom,gcc.yaml# properties: compatible: const: qcom,sm8250-camcc clocks: items: - description: AHB - description: Board XO source - description: Board active XO source - description: Sleep clock source clock-names: items: - const: iface - const: bi_tcxo - const: bi_tcxo_ao - const: sleep_clk power-domains: items: - description: MMCX power domain reg: maxItems: 1 required-opps: maxItems: 1 description: OPP node describing required MMCX performance point. required: - compatible - clocks - clock-names unevaluatedProperties: false examples: - | #include <dt-bindings/clock/qcom,gcc-sm8250.h> #include <dt-bindings/clock/qcom,rpmh.h> clock-controller@ad00000 { compatible = "qcom,sm8250-camcc"; reg = <0x0ad00000 0x10000>; clocks = <&gcc GCC_CAMERA_AHB_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>; clock-names = "iface", "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; }; ... |