Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 | # SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-mmc-config-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Allwinner A80 MMC Configuration Clock maintainers: - Chen-Yu Tsai <wens@csie.org> - Maxime Ripard <mripard@kernel.org> deprecated: true description: > There is one clock/reset output per mmc controller. The number of outputs is determined by the size of the address block, which is related to the overall mmc block. properties: "#clock-cells": const: 1 description: > The additional ID argument passed to the clock shall refer to the index of the output. "#reset-cells": const: 1 compatible: const: allwinner,sun9i-a80-mmc-config-clk reg: maxItems: 1 clocks: maxItems: 1 resets: maxItems: 1 clock-output-names: maxItems: 4 required: - "#clock-cells" - "#reset-cells" - compatible - reg - clocks - clock-output-names additionalProperties: false examples: - | clk@1c13000 { #clock-cells = <1>; #reset-cells = <1>; compatible = "allwinner,sun9i-a80-mmc-config-clk"; reg = <0x01c13000 0x10>; clocks = <&ahb0_gates 8>; resets = <&ahb0_resets 8>; clock-output-names = "mmc0_config", "mmc1_config", "mmc2_config", "mmc3_config"; }; ... |