Documentation / devicetree / bindings / clock / mediatek,mt2701-hifsys.yaml


Based on kernel version 6.10. Page generated on 2024-07-16 08:59 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/mediatek,mt2701-hifsys.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MediaTek HIFSYS clock and reset controller

description:
  The MediaTek HIFSYS controller provides various clocks and reset outputs to
  the system.

maintainers:
  - Matthias Brugger <matthias.bgg@gmail.com>

properties:
  compatible:
    oneOf:
      - enum:
          - mediatek,mt2701-hifsys
          - mediatek,mt7622-hifsys
      - items:
          - enum:
              - mediatek,mt7623-hifsys
          - const: mediatek,mt2701-hifsys

  reg:
    maxItems: 1
 
  "#clock-cells":
    const: 1
    description: The available clocks are defined in dt-bindings/clock/mt*-clk.h
 
  "#reset-cells":
    const: 1

required:
  - reg
  - "#clock-cells"

additionalProperties: false

examples:
  - |
    clock-controller@1a000000 {
        compatible = "mediatek,mt2701-hifsys";
        reg = <0x1a000000 0x1000>;
        #clock-cells = <1>;
        #reset-cells = <1>;
    };