Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/imx28-clock.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Freescale i.MX28 Clock Controller maintainers: - Shawn Guo <shawnguo@kernel.org> description: | The clock consumer should specify the desired clock by having the clock ID in its "clocks" phandle cell. The following is a full list of i.MX28 clocks and IDs. Clock ID ------------------ ref_xtal 0 pll0 1 pll1 2 pll2 3 ref_cpu 4 ref_emi 5 ref_io0 6 ref_io1 7 ref_pix 8 ref_hsadc 9 ref_gpmi 10 saif0_sel 11 saif1_sel 12 gpmi_sel 13 ssp0_sel 14 ssp1_sel 15 ssp2_sel 16 ssp3_sel 17 emi_sel 18 etm_sel 19 lcdif_sel 20 cpu 21 ptp_sel 22 cpu_pll 23 cpu_xtal 24 hbus 25 xbus 26 ssp0_div 27 ssp1_div 28 ssp2_div 29 ssp3_div 30 gpmi_div 31 emi_pll 32 emi_xtal 33 lcdif_div 34 etm_div 35 ptp 36 saif0_div 37 saif1_div 38 clk32k_div 39 rtc 40 lradc 41 spdif_div 42 clk32k 43 pwm 44 uart 45 ssp0 46 ssp1 47 ssp2 48 ssp3 49 gpmi 50 spdif 51 emi 52 saif0 53 saif1 54 lcdif 55 etm 56 fec 57 can0 58 can1 59 usb0 60 usb1 61 usb0_phy 62 usb1_phy 63 enet_out 64 properties: compatible: const: fsl,imx28-clkctrl reg: maxItems: 1 '#clock-cells': const: 1 required: - compatible - reg - '#clock-cells' additionalProperties: false examples: - | clock-controller@80040000 { compatible = "fsl,imx28-clkctrl"; reg = <0x80040000 0x2000>; #clock-cells = <1>; }; |