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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 | # SPDX-License-Identifier: GPL-2.0-only %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/qcom,gcc-mdm9615.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Global Clock & Reset Controller maintainers: - Stephen Boyd <sboyd@kernel.org> - Taniya Das <quic_tdas@quicinc.com> description: | Qualcomm global clock control module provides the clocks, resets and power domains. See also:: include/dt-bindings/clock/qcom,gcc-mdm9615.h allOf: - $ref: qcom,gcc.yaml# properties: compatible: enum: - qcom,gcc-mdm9615 clocks: items: - description: CXO clock - description: PLL4 from LLC '#power-domain-cells': false required: - compatible unevaluatedProperties: false examples: - | clock-controller@900000 { compatible = "qcom,gcc-mdm9615"; reg = <0x900000 0x4000>; #clock-cells = <1>; #reset-cells = <1>; clocks = <&cxo_board>, <&lcc_pll4>; }; ... |