Documentation / devicetree / bindings / clock / allwinner,sun4i-a10-ahb-clk.yaml


Based on kernel version 6.11. Page generated on 2024-09-24 08:21 EST.

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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ahb-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A10 AHB Clock

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

deprecated: true

properties:
  "#clock-cells":
    const: 0

  compatible:
    enum:
      - allwinner,sun4i-a10-ahb-clk
      - allwinner,sun6i-a31-ahb1-clk
      - allwinner,sun8i-h3-ahb2-clk

  reg:
    maxItems: 1

  clocks:
    minItems: 1
    maxItems: 4
    description: >
      The parent order must match the hardware programming order.

  clock-output-names:
    maxItems: 1

required:
  - "#clock-cells"
  - compatible
  - reg
  - clocks
  - clock-output-names

additionalProperties: false

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: allwinner,sun4i-a10-ahb-clk

    then:
      properties:
        clocks:
          maxItems: 1

  - if:
      properties:
        compatible:
          contains:
            const: allwinner,sun6i-a31-ahb1-clk

    then:
      properties:
        clocks:
          maxItems: 4

  - if:
      properties:
        compatible:
          contains:
            const: allwinner,sun8i-h3-ahb2-clk

    then:
      properties:
        clocks:
          maxItems: 2

examples:
  - |
    ahb@1c20054 {
        #clock-cells = <0>;
        compatible = "allwinner,sun4i-a10-ahb-clk";
        reg = <0x01c20054 0x4>;
        clocks = <&axi>;
        clock-output-names = "ahb";
    };

  - |
    ahb1@1c20054 {
        #clock-cells = <0>;
        compatible = "allwinner,sun6i-a31-ahb1-clk";
        reg = <0x01c20054 0x4>;
        clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
        clock-output-names = "ahb1";
    };

  - |
    ahb2_clk@1c2005c {
        #clock-cells = <0>;
        compatible = "allwinner,sun8i-h3-ahb2-clk";
        reg = <0x01c2005c 0x4>;
        clocks = <&ahb1>, <&pll6d2>;
        clock-output-names = "ahb2";
    };

...