Documentation / devicetree / bindings / clock / nxp,imx95-display-master-csr.yaml


Based on kernel version 6.11. Page generated on 2024-09-24 08:21 EST.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/nxp,imx95-display-master-csr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP i.MX95 Display Master Block Control

maintainers:
  - Peng Fan <peng.fan@nxp.com>

properties:
  compatible:
    items:
      - const: nxp,imx95-display-master-csr
      - const: syscon

  reg:
    maxItems: 1

  power-domains:
    maxItems: 1

  clocks:
    maxItems: 1
 
  '#clock-cells':
    const: 1
    description:
      The clock consumer should specify the desired clock by having the clock
      ID in its "clocks" phandle cell. See
      include/dt-bindings/clock/nxp,imx95-clock.h

  mux-controller:
    type: object
    $ref: /schemas/mux/reg-mux.yaml

required:
  - compatible
  - reg
  - '#clock-cells'
  - mux-controller
  - power-domains
  - clocks

additionalProperties: false

examples:
  - |
    syscon@4c410000 {
      compatible = "nxp,imx95-display-master-csr", "syscon";
      reg = <0x4c410000 0x10000>;
      #clock-cells = <1>;
      clocks = <&scmi_clk 62>;
      power-domains = <&scmi_devpd 3>;
 
      mux: mux-controller {
        compatible = "mmio-mux";
        #mux-control-cells = <1>;
        mux-reg-masks = <0x4 0x00000001>; /* Pixel_link_sel */
        idle-states = <0>;
      };
    };
...