Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/amlogic,a1-pll-clkc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Amlogic A1 PLL Clock Control Unit maintainers: - Neil Armstrong <neil.armstrong@linaro.org> - Jerome Brunet <jbrunet@baylibre.com> - Jian Hu <jian.hu@jian.hu.com> - Dmitry Rokosov <ddrokosov@sberdevices.ru> properties: compatible: const: amlogic,a1-pll-clkc '#clock-cells': const: 1 reg: maxItems: 1 clocks: items: - description: input fixpll_in - description: input hifipll_in - description: input syspll_in minItems: 2 # syspll_in is optional clock-names: items: - const: fixpll_in - const: hifipll_in - const: syspll_in minItems: 2 # syspll_in is optional required: - compatible - '#clock-cells' - reg - clocks - clock-names additionalProperties: false examples: - | #include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h> apb { #address-cells = <2>; #size-cells = <2>; clock-controller@7c80 { compatible = "amlogic,a1-pll-clkc"; reg = <0 0x7c80 0 0x18c>; #clock-cells = <1>; clocks = <&clkc_periphs CLKID_FIXPLL_IN>, <&clkc_periphs CLKID_HIFIPLL_IN>, <&clkc_periphs CLKID_SYSPLL_IN>; clock-names = "fixpll_in", "hifipll_in", "syspll_in"; }; }; |