Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm LPASS Core Clock Controller on SC7280 maintainers: - Taniya Das <quic_tdas@quicinc.com> description: | Qualcomm LPASS core clock control module provides the clocks and power domains on SC7280. See also:: include/dt-bindings/clock/qcom,lpass-sc7280.h properties: compatible: enum: - qcom,sc7280-lpasscc clocks: items: - description: gcc_cfg_noc_lpass_clk from GCC clock-names: items: - const: iface '#clock-cells': const: 1 reg: items: - description: LPASS qdsp6ss register - description: LPASS top-cc register reg-names: items: - const: qdsp6ss - const: top_cc qcom,adsp-pil-mode: description: Indicates if the LPASS would be brought out of reset using remoteproc peripheral loader. type: boolean required: - compatible - reg - clocks - clock-names - '#clock-cells' additionalProperties: false examples: - | #include <dt-bindings/clock/qcom,gcc-sc7280.h> #include <dt-bindings/clock/qcom,lpass-sc7280.h> clock-controller@3000000 { compatible = "qcom,sc7280-lpasscc"; reg = <0x03000000 0x40>, <0x03c04000 0x4>; reg-names = "qdsp6ss", "top_cc"; clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; qcom,adsp-pil-mode; #clock-cells = <1>; }; ... |