Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Global Clock & Reset Controller on IPQ8064 maintainers: - Ansuel Smith <ansuelsmth@gmail.com> description: | Qualcomm global clock control module provides the clocks, resets and power domains on IPQ8064. See also:: include/dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064) include/dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064) allOf: - $ref: qcom,gcc.yaml# properties: compatible: items: - const: qcom,gcc-ipq8064 - const: syscon clocks: minItems: 2 items: - description: PXO source - description: CXO source - description: PLL4 from LCC clock-names: minItems: 2 items: - const: pxo - const: cxo - const: pll4 thermal-sensor: type: object allOf: - $ref: /schemas/thermal/qcom-tsens.yaml# '#power-domain-cells': false required: - compatible - clocks - clock-names unevaluatedProperties: false examples: - | #include <dt-bindings/clock/qcom,lcc-ipq806x.h> #include <dt-bindings/interrupt-controller/arm-gic.h> gcc: clock-controller@900000 { compatible = "qcom,gcc-ipq8064", "syscon"; reg = <0x00900000 0x4000>; clocks = <&pxo_board>, <&cxo_board>, <&lcc PLL4>; clock-names = "pxo", "cxo", "pll4"; #clock-cells = <1>; #reset-cells = <1>; tsens: thermal-sensor { compatible = "qcom,ipq8064-tsens"; nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>; nvmem-cell-names = "calib", "calib_backup"; interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "uplow"; #qcom,sensors = <11>; #thermal-sensor-cells = <1>; }; }; |