Based on kernel version 6.19. Page generated on 2026-02-12 08:37 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/fsl,imx8ulp-sim-lpav.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: NXP i.MX8ULP LPAV System Integration Module (SIM) maintainers: - Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> description: The i.MX8ULP LPAV subsystem contains a block control module known as SIM LPAV, which offers functionalities such as clock gating or reset line assertion/de-assertion. properties: compatible: const: fsl,imx8ulp-sim-lpav reg: maxItems: 1 clocks: maxItems: 3 clock-names: items: - const: bus - const: core - const: plat '#clock-cells': const: 1 '#reset-cells': const: 1 mux-controller: $ref: /schemas/mux/reg-mux.yaml# required: - compatible - reg - clocks - clock-names - '#clock-cells' - '#reset-cells' - mux-controller additionalProperties: false examples: - | #include <dt-bindings/clock/imx8ulp-clock.h> clock-controller@2da50000 { compatible = "fsl,imx8ulp-sim-lpav"; reg = <0x2da50000 0x10000>; clocks = <&cgc2 IMX8ULP_CLK_LPAV_BUS_DIV>, <&cgc2 IMX8ULP_CLK_HIFI_DIVCORE>, <&cgc2 IMX8ULP_CLK_HIFI_DIVPLAT>; clock-names = "bus", "core", "plat"; #clock-cells = <1>; #reset-cells = <1>; mux-controller { compatible = "reg-mux"; #mux-control-cells = <1>; mux-reg-masks = <0x8 0x00000200>; }; }; |