Documentation / devicetree / bindings / clock / allwinner,sun4i-a10-mod0-clk.yaml


Based on kernel version 6.8. Page generated on 2024-03-11 21:26 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod0-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A10 Module 0 Clock

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

deprecated: true

select:
  properties:
    compatible:
      contains:
        enum:
          - allwinner,sun4i-a10-mod0-clk
          - allwinner,sun9i-a80-mod0-clk
 
  # The PRCM on the A31 and A23 will have the reg property missing,
  # since it's set at the upper level node, and will be validated by
  # PRCM's schema. Make sure we only validate standalone nodes.
  required:
    - compatible
    - reg

properties:
  "#clock-cells":
    const: 0

  compatible:
    enum:
      - allwinner,sun4i-a10-mod0-clk
      - allwinner,sun9i-a80-mod0-clk

  reg:
    maxItems: 1

  clocks:
    # On the A80, the PRCM mod0 clocks have 2 parents.
    minItems: 2
    maxItems: 3
    description: >
      The parent order must match the hardware programming order.

  clock-output-names:
    maxItems: 1

required:
  - "#clock-cells"
  - compatible
  - reg
  - clocks
  - clock-output-names

additionalProperties: false

examples:
  - |
    clk@1c20080 {
        #clock-cells = <0>;
        compatible = "allwinner,sun4i-a10-mod0-clk";
        reg = <0x01c20080 0x4>;
        clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
        clock-output-names = "nand";
    };

  - |
    clk@8001454 {
        #clock-cells = <0>;
        compatible = "allwinner,sun4i-a10-mod0-clk";
        reg = <0x08001454 0x4>;
        clocks = <&osc32k>, <&osc24M>;
        clock-output-names = "r_ir";
    };

...