Based on kernel version 6.13
. Page generated on 2025-01-21 08:20 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/qcom,sa8775p-camcc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Camera Clock & Reset Controller on SA8775P maintainers: - Taniya Das <quic_tdas@quicinc.com> description: | Qualcomm camera clock control module provides the clocks, resets and power domains on SA8775p. See also: include/dt-bindings/clock/qcom,sa8775p-camcc.h properties: compatible: enum: - qcom,sa8775p-camcc clocks: items: - description: Camera AHB clock from GCC - description: Board XO source - description: Board active XO source - description: Sleep clock source power-domains: maxItems: 1 description: MMCX power domain required: - compatible - clocks - power-domains - '#power-domain-cells' allOf: - $ref: qcom,gcc.yaml# unevaluatedProperties: false examples: - | #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/power/qcom-rpmpd.h> #include <dt-bindings/clock/qcom,sa8775p-gcc.h> clock-controller@ade0000 { compatible = "qcom,sa8775p-camcc"; reg = <0x0ade0000 0x20000>; clocks = <&gcc GCC_CAMERA_AHB_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>; power-domains = <&rpmhpd SA8775P_MMCX>; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; }; ... |