Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/starfive,jh7100-audclk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: StarFive JH7100 Audio Clock Generator maintainers: - Emil Renner Berthing <kernel@esmil.dk> properties: compatible: const: starfive,jh7100-audclk reg: maxItems: 1 clocks: items: - description: Audio source clock - description: External 12.288MHz clock - description: Domain 7 AHB bus clock clock-names: items: - const: audio_src - const: audio_12288 - const: dom7ahb_bus '#clock-cells': const: 1 description: See <dt-bindings/clock/starfive-jh7100-audio.h> for valid indices. required: - compatible - reg - clocks - clock-names - '#clock-cells' additionalProperties: false examples: - | #include <dt-bindings/clock/starfive-jh7100.h> clock-controller@10480000 { compatible = "starfive,jh7100-audclk"; reg = <0x10480000 0x10000>; clocks = <&clkgen JH7100_CLK_AUDIO_SRC>, <&clkgen JH7100_CLK_AUDIO_12288>, <&clkgen JH7100_CLK_DOM7AHB_BUS>; clock-names = "audio_src", "audio_12288", "dom7ahb_bus"; #clock-cells = <1>; }; |