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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/qcom,a7pll.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm A7 PLL clock maintainers: - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> description: The A7 PLL on the Qualcomm platforms like SDX55, SDX65 is used to provide high frequency clock to the CPU. properties: compatible: enum: - qcom,sdx55-a7pll reg: maxItems: 1 '#clock-cells': const: 0 clocks: items: - description: board XO clock clock-names: items: - const: bi_tcxo required: - compatible - reg - '#clock-cells' additionalProperties: false examples: - | #include <dt-bindings/clock/qcom,rpmh.h> a7pll: clock@17808000 { compatible = "qcom,sdx55-a7pll"; reg = <0x17808000 0x1000>; clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "bi_tcxo"; #clock-cells = <0>; }; |