Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Global Clock & Reset Controller on IPQ5332 maintainers: - Bjorn Andersson <andersson@kernel.org> description: | Qualcomm global clock control module provides the clocks, resets and power domains on IPQ5332. See also:: include/dt-bindings/clock/qcom,gcc-ipq5332.h allOf: - $ref: qcom,gcc.yaml# properties: compatible: const: qcom,ipq5332-gcc clocks: items: - description: Board XO clock source - description: Sleep clock source - description: PCIE 2lane PHY pipe clock source - description: PCIE 2lane x1 PHY pipe clock source (For second lane) - description: USB PCIE wrapper pipe clock source '#power-domain-cells': false required: - compatible - clocks unevaluatedProperties: false examples: - | clock-controller@1800000 { compatible = "qcom,ipq5332-gcc"; reg = <0x01800000 0x80000>; clocks = <&xo_board>, <&sleep_clk>, <&pcie_2lane_phy_pipe_clk>, <&pcie_2lane_phy_pipe_clk_x1>, <&usb_pcie_wrapper_pipe_clk>; #clock-cells = <1>; #reset-cells = <1>; }; ... |