Based on kernel version 6.14
. Page generated on 2025-04-02 08:20 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/st,stm32-rcc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: STMicroelectronics STM32 Reset Clock Controller maintainers: - Dario Binacchi <dario.binacchi@amarulasolutions.com> description: | The RCC IP is both a reset and a clock controller. The reset phandle argument is the bit number within the RCC registers bank, starting from RCC base address. properties: compatible: oneOf: - items: - enum: - st,stm32f42xx-rcc - st,stm32f746-rcc - st,stm32h743-rcc - const: st,stm32-rcc - items: - enum: - st,stm32f469-rcc - const: st,stm32f42xx-rcc - const: st,stm32-rcc - items: - enum: - st,stm32f769-rcc - const: st,stm32f746-rcc - const: st,stm32-rcc reg: maxItems: 1 '#reset-cells': const: 1 '#clock-cells': enum: [1, 2] clocks: minItems: 2 maxItems: 3 st,syscfg: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to system configuration controller. It can be used to control the power domain circuitry. st,ssc-modfreq-hz: description: The modulation frequency for main PLL (in Hz) st,ssc-moddepth-permyriad: $ref: /schemas/types.yaml#/definitions/uint32 description: The modulation rate for main PLL (in permyriad, i.e. 0.01%) minimum: 25 maximum: 200 st,ssc-modmethod: $ref: /schemas/types.yaml#/definitions/string description: The modulation techniques for main PLL. items: enum: - center-spread - down-spread required: - compatible - reg - '#reset-cells' - '#clock-cells' - clocks - st,syscfg allOf: - if: properties: compatible: contains: const: st,stm32h743-rcc then: properties: '#clock-cells': const: 1 description: | The clock index for the specified type. clocks: items: - description: high speed external (HSE) clock input - description: low speed external (LSE) clock input - description: Inter-IC sound (I2S) clock input st,ssc-modfreq-hz: false st,ssc-moddepth-permyriad: false st,ssc-modmethod: false else: properties: '#clock-cells': const: 2 description: | - The first cell is the clock type, possible values are 0 for gated clocks and 1 otherwise. - The second cell is the clock index for the specified type. clocks: items: - description: high speed external (HSE) clock input - description: Inter-IC sound (I2S) clock input additionalProperties: false examples: # Reset and Clock Control Module node: - | clock-controller@40023800 { compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; reg = <0x40023800 0x400>; #clock-cells = <2>; #reset-cells = <1>; clocks = <&clk_hse>, <&clk_i2s_ckin>; st,syscfg = <&pwrcfg>; st,ssc-modfreq-hz = <10000>; st,ssc-moddepth-permyriad = <200>; st,ssc-modmethod = "center-spread"; }; - | clock-controller@58024400 { compatible = "st,stm32h743-rcc", "st,stm32-rcc"; reg = <0x58024400 0x400>; #clock-cells = <1>; #reset-cells = <1>; clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s>; st,syscfg = <&pwrcfg>; }; ... |