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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/mediatek,mt8365-clock.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek Functional Clock Controller for MT8365 maintainers: - Markus Schneider-Pargmann <msp@baylibre.com> properties: compatible: items: - enum: - mediatek,mt8365-apu - mediatek,mt8365-imgsys - mediatek,mt8365-mfgcfg - mediatek,mt8365-vdecsys - mediatek,mt8365-vencsys - const: syscon reg: maxItems: 1 '#clock-cells': const: 1 required: - compatible - reg - '#clock-cells' additionalProperties: false examples: - | apu: clock-controller@19020000 { compatible = "mediatek,mt8365-apu", "syscon"; reg = <0x19020000 0x1000>; #clock-cells = <1>; }; |