Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm A53 PLL clock maintainers: - Bjorn Andersson <andersson@kernel.org> description: The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for frequencies above 1GHz. properties: compatible: enum: - qcom,ipq5018-a53pll - qcom,ipq5332-a53pll - qcom,ipq6018-a53pll - qcom,ipq8074-a53pll - qcom,ipq9574-a73pll - qcom,msm8916-a53pll - qcom,msm8939-a53pll reg: maxItems: 1 '#clock-cells': const: 0 clocks: items: - description: board XO clock clock-names: items: - const: xo operating-points-v2: true required: - compatible - reg - '#clock-cells' additionalProperties: false examples: # Example 1 - A53 PLL found on MSM8916 devices - | a53pll: clock@b016000 { compatible = "qcom,msm8916-a53pll"; reg = <0xb016000 0x40>; #clock-cells = <0>; }; # Example 2 - A53 PLL found on IPQ6018 devices - | a53pll_ipq: clock-controller@b116000 { compatible = "qcom,ipq6018-a53pll"; reg = <0x0b116000 0x40>; #clock-cells = <0>; clocks = <&xo>; clock-names = "xo"; }; |