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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/rockchip,rk3576-cru.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Rockchip rk3576 Family Clock and Reset Control Module maintainers: - Elaine Zhang <zhangqing@rock-chips.com> - Heiko Stuebner <heiko@sntech.de> - Detlev Casanova <detlev.casanova@collabora.com> description: The RK3576 clock controller generates the clock and also implements a reset controller for SoC peripherals. For example it provides SCLK_UART2 and PCLK_UART2, as well as SRST_P_UART2 and SRST_S_UART2 for the second UART module. properties: compatible: const: rockchip,rk3576-cru reg: maxItems: 1 "#clock-cells": const: 1 "#reset-cells": const: 1 clocks: maxItems: 2 clock-names: items: - const: xin24m - const: xin32k required: - compatible - reg - "#clock-cells" - "#reset-cells" additionalProperties: false examples: - | clock-controller@27200000 { compatible = "rockchip,rk3576-cru"; reg = <0xfd7c0000 0x5c000>; #clock-cells = <1>; #reset-cells = <1>; }; |