Documentation / devicetree / bindings / clock / qcom,nord-negcc.yaml


Based on kernel version 7.2. Page generated on 2026-08-20 08:41 EST.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,nord-negcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Global North East Clock & Reset Controller on Nord SoC

maintainers:
  - Taniya Das <taniya.das@oss.qualcomm.com>

description: |
  Qualcomm global clock control (NE) module provides the clocks, resets
  and power domains on Nord SoC.
 
  See also: include/dt-bindings/clock/qcom,nord-negcc.h

properties:
  compatible:
    const: qcom,nord-negcc

  clocks:
    items:
      - description: Board XO source
      - description: Sleep clock source
      - description: UFS Phy Rx symbol 0 clock source
      - description: UFS Phy Rx symbol 1 clock source
      - description: UFS Phy Tx symbol 0 clock source
      - description: USB3 Phy sec wrapper pipe clock source
      - description: USB3 Phy wrapper pipe clock source

required:
  - compatible
  - clocks
  - '#power-domain-cells'

allOf:
  - $ref: qcom,gcc.yaml#

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,rpmh.h>
    clock-controller@8900000 {
      compatible = "qcom,nord-negcc";
      reg = <0x08900000 0xf4200>;
      clocks = <&rpmhcc RPMH_CXO_CLK>,
               <&sleep_clk>,
               <&ufs_phy_rx_symbol_0_clk>,
               <&ufs_phy_rx_symbol_1_clk>,
               <&ufs_phy_tx_symbol_0_clk>,
               <&usb3_phy_sec_pipe_clk>,
               <&usb3_phy_pipe_clk>;
      #clock-cells = <1>;
      #reset-cells = <1>;
      #power-domain-cells = <1>;
    };

...