Based on kernel version 6.13
. Page generated on 2025-01-21 08:20 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 | Device Tree Clock bindings for arch-moxart This binding uses the common clock binding[1]. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt MOXA ART SoCs allow to determine PLL output and APB frequencies by reading registers holding multiplier and divisor information. PLL: Required properties: - compatible : Must be "moxa,moxart-pll-clock" - #clock-cells : Should be 0 - reg : Should contain registers location and length - clocks : Should contain phandle + clock-specifier for the parent clock Optional properties: - clock-output-names : Should contain clock name APB: Required properties: - compatible : Must be "moxa,moxart-apb-clock" - #clock-cells : Should be 0 - reg : Should contain registers location and length - clocks : Should contain phandle + clock-specifier for the parent clock Optional properties: - clock-output-names : Should contain clock name For example: clk_pll: clk_pll@98100000 { compatible = "moxa,moxart-pll-clock"; #clock-cells = <0>; reg = <0x98100000 0x34>; }; clk_apb: clk_apb@98100000 { compatible = "moxa,moxart-apb-clock"; #clock-cells = <0>; reg = <0x98100000 0x34>; clocks = <&clk_pll>; }; |