# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/renesas,fsi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas FIFO-buffered Serial Interface (FSI)

maintainers:
  - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

properties:
  $nodename:
    pattern: "^sound@.*"

  compatible:
    oneOf:
      # for FSI2 SoC
      - items:
          - enum:
              - renesas,fsi2-sh73a0  # SH-Mobile AG5
              - renesas,fsi2-r8a7740 # R-Mobile A1
          - enum:
              - renesas,sh_fsi2
      # for Generic
      - items:
          - enum:
              - renesas,sh_fsi
              - renesas,sh_fsi2

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    minItems: 1
    items:
      - description: Main FSI module clock
      - description: |
          SPU bus/bridge clock. On R8A7740, this clock must be enabled to allow
          register access as the FSI block is connected behind the SPU bus.
      - description: CPG DIV6 functional clocks for FSI port A
      - description: CPG DIV6 functional clocks for FSI port B
      - description: FSI dividers for port A used for audio clock generation
      - description: FSI dividers for port B used for audio clock generation
      - description: External clock inputs for FSI port A provided by the board
      - description: External clock inputs for FSI port B provided by the board

  clock-names:
    minItems: 1
    maxItems: 8
    items:
      enum:
        - fck  # Main FSI module clock
        - spu  # optional SPU bus/bridge clock
        - icka # optional CPG DIV6 functional clocks for FSI port A
        - ickb # optional CPG DIV6 functional clocks for FSI port B
        - diva # optional FSI dividers for port A used for audio clock generation
        - divb # optional FSI dividers for port B used for audio clock generation
        - xcka # optional External clock inputs for FSI port A provided by the board
        - xckb # optional External clock inputs for FSI port B provided by the board

  power-domains:
    maxItems: 1
 
  '#sound-dai-cells':
    const: 1

patternProperties:
  "^fsi(a|b),spdif-connection$":
    $ref: /schemas/types.yaml#/definitions/flag
    description: FSI is connected by S/PDIF
 
  "^fsi(a|b),stream-mode-support$":
    $ref: /schemas/types.yaml#/definitions/flag
    description: FSI supports 16bit stream mode
 
  "^fsi(a|b),use-internal-clock$":
    $ref: /schemas/types.yaml#/definitions/flag
    description: FSI uses internal clock when master mode

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - power-domains
  - '#sound-dai-cells'

unevaluatedProperties: false

allOf:
  - $ref: dai-common.yaml#
  - if:
      properties:
        compatible:
          contains:
            const: renesas,fsi2-r8a7740
    then:
      required:
        - clock-names

      properties:
        clock-names:
          minItems: 2
          items:
            - const: fck
            - const: spu
            - enum: [icka, ickb, diva, divb, xcka, xckb]
            - enum: [icka, ickb, diva, divb, xcka, xckb]
            - enum: [icka, ickb, diva, divb, xcka, xckb]
            - enum: [icka, ickb, diva, divb, xcka, xckb]
            - enum: [icka, ickb, diva, divb, xcka, xckb]
            - enum: [icka, ickb, diva, divb, xcka, xckb]

examples:
  - |
    #include <dt-bindings/clock/r8a7740-clock.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    sh_fsi2: sound@fe1f0000 {
            compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
            reg = <0xfe1f0000 0x400>;
            interrupts = <GIC_SPI 9 0x4>;
            clocks = <&mstp3_clks R8A7740_CLK_FSI>, <&spu_clk>,
                    <&fsia_clk>, <&fsiack_clk>, <&fsidiva_clk>,
                    <&fsib_clk>, <&fsibck_clk>, <&fsidivb_clk>;
            clock-names = "fck", "spu", "icka", "xcka", "diva",
                         "ickb", "xckb", "divb";
            power-domains = <&pd_a4mp>;
 
            #sound-dai-cells = <1>;
            fsia,spdif-connection;
            fsia,stream-mode-support;
            fsia,use-internal-clock;
    };