Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-rt5631.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: NVIDIA Tegra audio complex with RT5631 CODEC maintainers: - Jon Hunter <jonathanh@nvidia.com> - Thierry Reding <thierry.reding@gmail.com> allOf: - $ref: nvidia,tegra-audio-common.yaml# properties: compatible: items: - pattern: '^[a-z0-9]+,tegra-audio-rt5631(-[a-z0-9]+)+$' - const: nvidia,tegra-audio-rt5631 nvidia,audio-routing: $ref: /schemas/types.yaml#/definitions/non-unique-string-array description: | A list of the connections between audio components. Each entry is a pair of strings, the first being the connection's sink, the second being the connection's source. Valid names for sources and sinks are the pins (documented in the binding document), and the jacks on the board. minItems: 2 items: enum: # Board Connectors - Int Spk - Headphone Jack - Mic Jack - Int Mic # CODEC Pins - MIC1 - MIC2 - AXIL - AXIR - MONOIN_RXN - MONOIN_RXP - DMIC - MIC Bias1 - MIC Bias2 - MONO_IN - AUXO1 - AUXO2 - SPOL - SPOR - HPOL - HPOR - MONO unevaluatedProperties: false examples: - | #include <dt-bindings/clock/tegra30-car.h> #include <dt-bindings/soc/tegra-pmc.h> sound { compatible = "asus,tegra-audio-rt5631-tf700t", "nvidia,tegra-audio-rt5631"; nvidia,model = "Asus Transformer Infinity TF700T RT5631"; nvidia,audio-routing = "Headphone Jack", "HPOL", "Headphone Jack", "HPOR", "Int Spk", "SPOL", "Int Spk", "SPOR", "MIC1", "MIC Bias1", "MIC Bias1", "Mic Jack", "DMIC", "Int Mic"; nvidia,i2s-controller = <&tegra_i2s1>; nvidia,audio-codec = <&rt5631>; clocks = <&tegra_car TEGRA30_CLK_PLL_A>, <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; clock-names = "pll_a", "pll_a_out0", "mclk"; }; |