Based on kernel version 7.2. Page generated on 2026-08-20 08:41 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/sound/cdns,xtfpga-i2s.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: I2S controller built into xtfpga Xtensa bitstreams maintainers: - Max Filippov <jcmvbkbc@gmail.com> allOf: - $ref: dai-common.yaml# properties: compatible: const: cdns,xtfpga-i2s reg: maxItems: 1 interrupts: maxItems: 1 clocks: maxItems: 1 description: phandle to the clk used as master clock. I2S bus clock is derived from it. "#sound-dai-cells": const: 0 required: - compatible - reg - interrupts - clocks unevaluatedProperties: false examples: - | i2s@d080000 { compatible = "cdns,xtfpga-i2s"; reg = <0x0d080000 0x40>; interrupts = <2 1>; clocks = <&cdce706 4>; #sound-dai-cells = <0>; }; |