Documentation / devicetree / bindings / pci / pci-ep-bus.yaml


Based on kernel version 6.15. Page generated on 2025-05-29 09:09 EST.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/pci-ep-bus.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Common Properties for PCI MFD EP with Peripherals Addressable from BARs

maintainers:
  - A. della Porta  <andrea.porta@suse.com>

description:
  Define a generic node representing a PCI endpoint which contains several sub-
  peripherals. The peripherals can be accessed through one or more BARs.
  This common schema is intended to be referenced from device tree bindings and
  does not represent a device tree binding by itself.

properties:
  '#address-cells':
    const: 3
 
  '#size-cells':
    const: 2

  ranges:
    minItems: 1
    maxItems: 6
    items:
      maxItems: 8
      additionalItems: true
      items:
        - maximum: 5  # The BAR number
        - const: 0
        - const: 0

patternProperties:
  '^pci-ep-bus@[0-5]$':
    type: object
    description:
      One node for each BAR used by peripherals contained in the PCI endpoint.
      Each node represents a bus on which peripherals are connected.
      This allows for some segmentation, e.g., one peripheral is accessible
      through BAR0 and another through BAR1, and you don't want the two
      peripherals to be able to act on the other BAR. Alternatively, when
      different peripherals need to share BARs, you can define only one node
      and use a 'ranges' property to map all the used BARs.

    additionalProperties: true

    properties:
      compatible:
        const: simple-bus

    required:
      - compatible

additionalProperties: true
...