Based on kernel version 6.12.4
. Page generated on 2024-12-12 21:01 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 | * AppliedMicro X-Gene PCIe interface Required properties: - device_type: set to "pci" - compatible: should contain "apm,xgene-pcie" to identify the core. - reg: A list of physical base address and length for each set of controller registers. Must contain an entry for each entry in the reg-names property. - reg-names: Must include the following entries: "csr": controller configuration registers. "cfg": PCIe configuration space registers. - #address-cells: set to <3> - #size-cells: set to <2> - ranges: ranges for the outbound memory, I/O regions. - dma-ranges: ranges for the inbound memory regions. - #interrupt-cells: set to <1> - interrupt-map-mask and interrupt-map: standard PCI properties to define the mapping of the PCIe interface to interrupt numbers. - clocks: from common clock binding: handle to pci clock. Optional properties: - status: Either "ok" or "disabled". - dma-coherent: Present if DMA operations are coherent Example: pcie0: pcie@1f2b0000 { status = "disabled"; device_type = "pci"; compatible = "apm,xgene-storm-pcie", "apm,xgene-pcie"; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; reg = < 0x00 0x1f2b0000 0x0 0x00010000 /* Controller registers */ 0xe0 0xd0000000 0x0 0x00040000>; /* PCI config space */ reg-names = "csr", "cfg"; ranges = <0x01000000 0x00 0x00000000 0xe0 0x10000000 0x00 0x00010000 /* io */ 0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1 0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>; dma-coherent; clocks = <&pcie0clk 0>; }; |