Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright (C) 2020 Renesas Electronics Corp. %YAML 1.2 --- $id: http://devicetree.org/schemas/pci/rcar-pci-host.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Renesas R-Car PCIe Host maintainers: - Marek Vasut <marek.vasut+renesas@gmail.com> - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> allOf: - $ref: /schemas/pci/pci-host-bridge.yaml# properties: compatible: oneOf: - const: renesas,pcie-r8a7779 # R-Car H1 - items: - enum: - renesas,pcie-r8a7742 # RZ/G1H - renesas,pcie-r8a7743 # RZ/G1M - renesas,pcie-r8a7744 # RZ/G1N - renesas,pcie-r8a7790 # R-Car H2 - renesas,pcie-r8a7791 # R-Car M2-W - renesas,pcie-r8a7793 # R-Car M2-N - const: renesas,pcie-rcar-gen2 # R-Car Gen2 and RZ/G1 - items: - enum: - renesas,pcie-r8a774a1 # RZ/G2M - renesas,pcie-r8a774b1 # RZ/G2N - renesas,pcie-r8a774c0 # RZ/G2E - renesas,pcie-r8a774e1 # RZ/G2H - renesas,pcie-r8a7795 # R-Car H3 - renesas,pcie-r8a7796 # R-Car M3-W - renesas,pcie-r8a77961 # R-Car M3-W+ - renesas,pcie-r8a77965 # R-Car M3-N - renesas,pcie-r8a77980 # R-Car V3H - renesas,pcie-r8a77990 # R-Car E3 - const: renesas,pcie-rcar-gen3 # R-Car Gen3 and RZ/G2 reg: maxItems: 1 interrupts: minItems: 3 maxItems: 3 clocks: maxItems: 2 clock-names: items: - const: pcie - const: pcie_bus power-domains: maxItems: 1 resets: maxItems: 1 phys: maxItems: 1 phy-names: const: pcie vpcie1v5-supply: description: The 1.5v regulator to use for PCIe. vpcie3v3-supply: description: The 3.3v regulator to use for PCIe. vpcie12v-supply: description: The 12v regulator to use for PCIe. iommu-map: true iommu-map-mask: true required: - compatible - reg - interrupts - clocks - clock-names - power-domains if: not: properties: compatible: contains: const: renesas,pcie-r8a7779 then: required: - resets unevaluatedProperties: false examples: - | #include <dt-bindings/clock/r8a7791-cpg-mssr.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/r8a7791-sysc.h> soc { #address-cells = <2>; #size-cells = <2>; pcie: pcie@fe000000 { compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2"; reg = <0 0xfe000000 0 0x80000>; #address-cells = <3>; #size-cells = <2>; bus-range = <0x00 0xff>; device_type = "pci"; ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>, <0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; clock-names = "pcie", "pcie_bus"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; resets = <&cpg 319>; vpcie3v3-supply = <&pcie_3v3>; vpcie12v-supply = <&pcie_12v>; }; }; |