Based on kernel version 7.0. Page generated on 2026-04-23 09:48 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie-common.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Rockchip AXI PCIe Bridge Common Properties maintainers: - Shawn Lin <shawn.lin@rock-chips.com> properties: reg: maxItems: 2 clocks: maxItems: 4 clock-names: items: - const: aclk - const: aclk-perf - const: hclk - const: pm num-lanes: maximum: 4 phys: oneOf: - maxItems: 1 - maxItems: 4 phy-names: oneOf: - const: pcie-phy - items: - const: pcie-phy-0 - const: pcie-phy-1 - const: pcie-phy-2 - const: pcie-phy-3 resets: maxItems: 7 reset-names: items: - const: core - const: mgmt - const: mgmt-sticky - const: pipe - const: pm - const: pclk - const: aclk required: - compatible - reg - reg-names - clocks - clock-names - phys - phy-names - resets - reset-names additionalProperties: true ... |