# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5210-tlmm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm IPQ5210 TLMM pin controller

maintainers:
  - Bjorn Andersson <andersson@kernel.org>
  - Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>

description:
  Top Level Mode Multiplexer pin controller in Qualcomm IPQ5210 SoC.

allOf:
  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#

properties:
  compatible:
    const: qcom,ipq5210-tlmm

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  gpio-reserved-ranges:
    minItems: 1
    maxItems: 27

  gpio-line-names:
    maxItems: 54

patternProperties:
  "-state$":
    oneOf:
      - $ref: "#/$defs/qcom-ipq5210-tlmm-state"
      - patternProperties:
          "-pins$":
            $ref: "#/$defs/qcom-ipq5210-tlmm-state"
        additionalProperties: false

$defs:
  qcom-ipq5210-tlmm-state:
    type: object
    description:
      Pinctrl node's client devices use subnodes for desired pin configuration.
      Client device subnodes use below standard properties.
    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
    unevaluatedProperties: false

    properties:
      pins:
        description:
          List of gpio pins affected by the properties specified in this
          subnode.
        items:
          pattern: "^gpio([0-9]|[1-4][0-9]|5[0-3])$"
        minItems: 1
        maxItems: 36

      function:
        description:
          Specify the alternative function to be configured for the specified
          pins.

        enum: [ atest_char_start, atest_char_status0, atest_char_status1,
                atest_char_status2, atest_char_status3, atest_tic_en, audio_pri,
                audio_pri_mclk_out0, audio_pri_mclk_in0, audio_pri_mclk_out1,
                audio_pri_mclk_in1, audio_pri_mclk_out2, audio_pri_mclk_in2,
                audio_pri_mclk_out3, audio_pri_mclk_in3, audio_sec,
                audio_sec_mclk_out0, audio_sec_mclk_in0, audio_sec_mclk_out1,
                audio_sec_mclk_in1, audio_sec_mclk_out2, audio_sec_mclk_in2,
                audio_sec_mclk_out3, audio_sec_mclk_in3, core_voltage_0,
                cri_trng0, cri_trng1, cri_trng2, cri_trng3, dbg_out_clk, dg_out,
                gcc_plltest_bypassnl, gcc_plltest_resetn, gcc_tlmm, gpio, led0,
                led1, led2, mdc_mst, mdc_slv0, mdc_slv1, mdc_slv2, mdio_mst,
                mdio_slv0, mdio_slv1, mdio_slv2, mux_tod_out, pcie0_clk_req_n,
                pcie0_wake, pcie1_clk_req_n, pcie1_wake, pll_test,
                pon_active_led, pon_mux_sel, pon_rx, pon_rx_los, pon_tx,
                pon_tx_burst, pon_tx_dis, pon_tx_fault, pon_tx_sd, gpn_rx_los,
                gpn_tx_burst, gpn_tx_dis, gpn_tx_fault, gpn_tx_sd, pps, pwm0,
                pwm1, pwm2, pwm3, qdss_cti_trig_in_a0, qdss_cti_trig_in_a1,
                qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, qdss_cti_trig_out_a0,
                qdss_cti_trig_out_a1, qdss_cti_trig_out_b0,
                qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_tracectl_a,
                qdss_tracedata_a, qrng_rosc0, qrng_rosc1, qrng_rosc2,
                qspi_data, qspi_clk, qspi_cs_n, qup_se0, qup_se1, qup_se2,
                qup_se3, qup_se4, qup_se5, qup_se5_l1, resout, rx_los0, rx_los1,
                rx_los2, sdc_clk, sdc_cmd, sdc_data, tsens_max ]

    required:
      - pins

required:
  - compatible
  - reg

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
 
    tlmm: pinctrl@1000000 {
        compatible = "qcom,ipq5210-tlmm";
        reg = <0x01000000 0x300000>;
        gpio-controller;
        #gpio-cells = <0x2>;
        gpio-ranges = <&tlmm 0 0 54>;
        interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
        interrupt-controller;
        #interrupt-cells = <0x2>;
 
        qup-uart1-default-state {
            pins = "gpio38", "gpio39";
            function = "qup_se1";
            drive-strength = <6>;
            bias-pull-down;
        };
    };