Documentation / devicetree / bindings / pinctrl / qcom,sm4250-lpass-lpi-pinctrl.yaml


Based on kernel version 6.11. Page generated on 2024-09-24 08:21 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/qcom,sm4250-lpass-lpi-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm SM4250 SoC LPASS LPI TLMM

maintainers:
  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

description:
  Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
  (LPASS) Low Power Island (LPI) of Qualcomm SM4250 SoC.

properties:
  compatible:
    const: qcom,sm4250-lpass-lpi-pinctrl

  reg:
    items:
      - description: LPASS LPI TLMM Control and Status registers
      - description: LPASS LPI MCC registers

  clocks:
    items:
      - description: LPASS Audio voting clock

  clock-names:
    items:
      - const: audio

patternProperties:
  "-state$":
    oneOf:
      - $ref: "#/$defs/qcom-sm4250-lpass-state"
      - patternProperties:
          "-pins$":
            $ref: "#/$defs/qcom-sm4250-lpass-state"
        additionalProperties: false

$defs:
  qcom-sm4250-lpass-state:
    type: object
    description:
      Pinctrl node's client devices use subnodes for desired pin configuration.
      Client device subnodes use below standard properties.
    $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
    unevaluatedProperties: false

    properties:
      pins:
        description:
          List of gpio pins affected by the properties specified in this
          subnode.
        items:
          pattern: "^gpio([0-9]|1[0-9]|2[0-6])$"

      function:
        enum: [ gpio, dmic01_clk, dmic01_data, dmic23_clk, dmic23_data,
                dmic4_clk, dmic4_data, ext_mclk0_a, ext_mclk0_b, ext_mclk1_a,
                ext_mclk1_b, ext_mclk1_c, i2s1_clk, i2s1_data, i2s1_ws,
                i2s2_clk, i2s2_data, i2s2_ws, i2s3_clk, i2s3_data, i2s3_ws,
                qua_mi2s_data, qua_mi2s_sclk, qua_mi2s_ws, slim_clk, slim_data,
                swr_rx_clk, swr_rx_data, swr_tx_clk, swr_tx_data, swr_wsa_clk,
                swr_wsa_data ]
        description:
          Specify the alternative function to be configured for the specified
          pins.

allOf:
  - $ref: qcom,lpass-lpi-common.yaml#

required:
  - compatible
  - reg
  - clocks
  - clock-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/sound/qcom,q6afe.h>
    lpi_tlmm: pinctrl@a7c0000 {
        compatible = "qcom,sm4250-lpass-lpi-pinctrl";
        reg = <0xa7c0000 0x20000>,
              <0xa950000 0x10000>;
        clocks = <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
        clock-names = "audio";
        gpio-controller;
        #gpio-cells = <2>;
        gpio-ranges = <&lpi_tlmm 0 0 19>;
 
        i2s2-active-state {
            clk-pins {
                pins = "gpio10";
                function = "i2s2_clk";
                drive-strength = <2>;
                slew-rate = <1>;
                bias-disable;
            };
 
            data-pins {
                pins = "gpio12";
                function = "i2s2_data";
                drive-strength = <2>;
                slew-rate = <1>;
            };
        };
 
        i2s2-sleep-clk-state {
            pins = "gpio10";
            function = "i2s2_clk";
            drive-strength = <2>;
            bias-pull-down;
        };
    };