Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/pinctrl/intel,lgm-io.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Intel Lightning Mountain SoC pinmux & GPIO controller maintainers: - Rahul Tanwar <rahul.tanwar@linux.intel.com> description: | Pinmux & GPIO controller controls pin multiplexing & configuration including GPIO function selection & GPIO attributes configuration. properties: compatible: const: intel,lgm-io reg: maxItems: 1 # Client device subnode's properties patternProperties: '-pins$': type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. $ref: pinmux-node.yaml# properties: function: true groups: true pins: true pinmux: true bias-pull-up: true bias-pull-down: true drive-strength: true slew-rate: true drive-open-drain: true output-enable: true required: - function - groups additionalProperties: false allOf: - $ref: pinctrl.yaml# required: - compatible - reg additionalProperties: false examples: # Pinmux controller node - | pinctrl: pinctrl@e2880000 { compatible = "intel,lgm-io"; reg = <0xe2880000 0x100000>; uart0-pins { pins = <64>, /* UART_RX0 */ <65>; /* UART_TX0 */ function = "CONSOLE_UART0"; pinmux = <1>, <1>; groups = "CONSOLE_UART0"; }; }; ... |