Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek MT8186 Pin Controller maintainers: - Sean Wang <sean.wang@mediatek.com> description: The MediaTek's MT8186 Pin controller is used to control SoC pins. properties: compatible: const: mediatek,mt8186-pinctrl gpio-controller: true '#gpio-cells': description: Number of cells in GPIO specifier. Since the generic GPIO binding is used, the amount of cells must be specified as 2. See the below mentioned gpio binding representation for description of particular cells. const: 2 gpio-ranges: maxItems: 1 gpio-line-names: true reg: description: Physical address base for GPIO base registers. There are 8 different GPIO physical address base in mt8186. maxItems: 8 reg-names: description: GPIO base register names. items: - const: iocfg0 - const: iocfg_lt - const: iocfg_lm - const: iocfg_lb - const: iocfg_bl - const: iocfg_rb - const: iocfg_rt - const: eint interrupt-controller: true '#interrupt-cells': const: 2 interrupts: description: The interrupt outputs to sysirq maxItems: 1 mediatek,rsel-resistance-in-si-unit: type: boolean description: Identifying i2c pins pull up/down type which is RSEL. It can support RSEL define or si unit value(ohm) to set different resistance. # PIN CONFIGURATION NODES patternProperties: '-pins$': type: object additionalProperties: false patternProperties: '^pins': type: object additionalProperties: false description: | A pinctrl node should contain at least one subnodes representing the pinctrl groups available on the machine. Each subnode will list the pins it needs, and how they should be configured, with regard to muxer configuration, pullups, drive strength, input enable/disable and input schmitt. An example of using macro: pincontroller { /* GPIO0 set as multifunction GPIO0 */ gpio-pins { pins { pinmux = <PINMUX_GPIO0__FUNC_GPIO0>; } }; /* GPIO128 set as multifunction SDA0 */ i2c0-pins { pins { pinmux = <PINMUX_GPIO128__FUNC_SDA0>; } }; }; $ref: pinmux-node.yaml properties: pinmux: description: Integer array, represents gpio pin number and mux setting. Supported pin number and mux varies for different SoCs, and are defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly. drive-strength: enum: [2, 4, 6, 8, 10, 12, 14, 16] drive-strength-microamp: enum: [125, 250, 500, 1000] bias-pull-down: oneOf: - type: boolean - enum: [100, 101, 102, 103] description: mt8186 pull down PUPD/R0/R1 type define value. - enum: [200, 201, 202, 203] description: mt8186 pull down RSEL type define value. - enum: [75000, 5000] description: mt8186 pull down RSEL type si unit value(ohm). description: | For pull down type is normal, it don't need add RSEL & R1R0 define and resistance value. For pull down type is PUPD/R0/R1 type, it can add R1R0 define to set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11" define in mt8186. For pull down type is RSEL, it can add RSEL define & resistance value(ohm) to set different resistance by identifying property "mediatek,rsel-resistance-in-si-unit". It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" define in mt8186. It can also support resistance value(ohm) "75000" & "5000" in mt8186. An example of using RSEL define: pincontroller { i2c0_pin { pins { pinmux = <PINMUX_GPIO128__FUNC_SDA0>; bias-pull-down = <MTK_PULL_SET_RSEL_001>; } }; }; An example of using si unit resistance value(ohm): &pio { mediatek,rsel-resistance-in-si-unit; } pincontroller { i2c0_pin { pins { pinmux = <PINMUX_GPIO128__FUNC_SDA0>; bias-pull-down = <75000>; } }; }; bias-pull-up: oneOf: - type: boolean - enum: [100, 101, 102, 103] description: mt8186 pull up PUPD/R0/R1 type define value. - enum: [200, 201, 202, 203] description: mt8186 pull up RSEL type define value. - enum: [1000, 5000, 10000, 75000] description: mt8186 pull up RSEL type si unit value(ohm). description: | For pull up type is normal, it don't need add RSEL & R1R0 define and resistance value. For pull up type is PUPD/R0/R1 type, it can add R1R0 define to set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11" define in mt8186. For pull up type is RSEL, it can add RSEL define & resistance value(ohm) to set different resistance by identifying property "mediatek,rsel-resistance-in-si-unit". It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" define in mt8186. It can also support resistance value(ohm) "1000" & "5000" & "10000" & "75000" in mt8186. An example of using si unit resistance value(ohm): &pio { mediatek,rsel-resistance-in-si-unit; } pincontroller { i2c0-pins { pins { pinmux = <PINMUX_GPIO128__FUNC_SDA0>; bias-pull-up = <1000>; } }; }; bias-disable: true output-high: true output-low: true input-enable: true input-disable: true input-schmitt-enable: true input-schmitt-disable: true required: - pinmux required: - compatible - reg - interrupts - interrupt-controller - '#interrupt-cells' - gpio-controller - '#gpio-cells' - gpio-ranges additionalProperties: false examples: - | #include <dt-bindings/pinctrl/mt8186-pinfunc.h> #include <dt-bindings/interrupt-controller/arm-gic.h> pio: pinctrl@10005000 { compatible = "mediatek,mt8186-pinctrl"; reg = <0x10005000 0x1000>, <0x10002000 0x0200>, <0x10002200 0x0200>, <0x10002400 0x0200>, <0x10002600 0x0200>, <0x10002A00 0x0200>, <0x10002c00 0x0200>, <0x1000b000 0x1000>; reg-names = "iocfg0", "iocfg_lt", "iocfg_lm", "iocfg_lb", "iocfg_bl", "iocfg_rb", "iocfg_rt", "eint"; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pio 0 0 185>; interrupt-controller; interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH 0>; #interrupt-cells = <2>; pio-pins { pins { pinmux = <PINMUX_GPIO0__FUNC_GPIO0>; output-low; }; }; spi0-pins { pins-spi { pinmux = <PINMUX_GPIO0__FUNC_SPI0_CLK_B>, <PINMUX_GPIO1__FUNC_SPI0_CSB_B>, <PINMUX_GPIO2__FUNC_SPI0_MO_B>; bias-disable; }; pins-spi-mi { pinmux = <PINMUX_GPIO3__FUNC_SPI0_MI_B>; bias-pull-down; }; }; i2c0-pins { pins { pinmux = <PINMUX_GPIO127__FUNC_SCL0>, <PINMUX_GPIO128__FUNC_SDA0>; bias-pull-up = <MTK_PULL_SET_RSEL_001>; drive-strength-microamp = <1000>; }; }; }; |