Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/pinctrl/qcom,mdm9615-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Technologies, Inc. MDM9615 TLMM block maintainers: - Bjorn Andersson <andersson@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm MDM9615 SoC. $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# properties: compatible: const: qcom,mdm9615-pinctrl reg: maxItems: 1 interrupts: maxItems: 1 patternProperties: "-state$": oneOf: - $ref: "#/$defs/qcom-mdm9615-pinctrl-state" - patternProperties: "-pins$": $ref: "#/$defs/qcom-mdm9615-pinctrl-state" additionalProperties: false $defs: qcom-mdm9615-pinctrl-state: type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state unevaluatedProperties: false properties: pins: description: List of gpio pins affected by the properties specified in this subnode. items: pattern: "^gpio([0-9]|[1-7][0-9]|8[0-7])$" minItems: 1 maxItems: 16 function: description: Specify the alternative function to be configured for the specified pins. enum: [ gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart, sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio, cdc_mclk, ] required: - pins required: - compatible - reg unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> tlmm: pinctrl@1000000 { compatible = "qcom,mdm9615-pinctrl"; reg = <0x01000000 0x300000>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; gpio-ranges = <&msmgpio 0 0 88>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; gsbi3-state { pins = "gpio8", "gpio9", "gpio10", "gpio11"; function = "gsbi3"; drive-strength = <8>; bias-disable; }; gsbi5-i2c-state { sda-pins { pins = "gpio16"; function = "gsbi5_i2c"; drive-strength = <8>; bias-disable; }; scl-pins { pins = "gpio17"; function = "gsbi5_i2c"; drive-strength = <2>; bias-disable; }; }; }; |