Based on kernel version 6.17
. Page generated on 2025-10-03 10:04 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/pinctrl/nxp,lpc1850-scu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: NXP LPC18xx/43xx SCU pin controller description: Not all pins support all pin generic node properties so either refer to the NXP 1850/4350 user manual or the pin table in the pinctrl-lpc18xx driver for supported pin properties. maintainers: - Frank Li <Frank.Li@nxp.com> properties: compatible: const: nxp,lpc1850-scu reg: maxItems: 1 clocks: maxItems: 1 patternProperties: '-pins$': type: object additionalProperties: false patternProperties: '_cfg$': type: object allOf: - $ref: pincfg-node.yaml# - $ref: pinmux-node.yaml# unevaluatedProperties: false properties: nxp,gpio-pin-interrupt: $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 maximum: 7 description: Assign pin to gpio pin interrupt controller irq number 0 to 7. See example below. required: - compatible - reg - clocks allOf: - $ref: pinctrl.yaml# unevaluatedProperties: false examples: - | #include <dt-bindings/clock/lpc18xx-ccu.h> pinctrl@40086000 { compatible = "nxp,lpc1850-scu"; reg = <0x40086000 0x1000>; clocks = <&ccu1 CLK_CPU_SCU>; gpio-joystick-pins { gpio-joystick-1_cfg { pins = "p9_0"; function = "gpio"; nxp,gpio-pin-interrupt = <0>; input-enable; bias-disable; }; }; }; |