Based on kernel version 6.13
. Page generated on 2025-01-21 08:20 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 | NXP LPC18xx/43xx SCU pin controller Device Tree Bindings -------------------------------------------------------- Required properties: - compatible : Should be "nxp,lpc1850-scu" - reg : Address and length of the register set for the device - clocks : Clock specifier (see clock bindings for details) The lpc1850-scu driver uses the generic pin multiplexing and generic pin configuration documented in pinctrl-bindings.txt. The following generic nodes are supported: - function - pins - bias-disable - bias-pull-up - bias-pull-down - drive-strength - input-enable - input-disable - input-schmitt-enable - input-schmitt-disable - slew-rate NXP specific properties: - nxp,gpio-pin-interrupt : Assign pin to gpio pin interrupt controller irq number 0 to 7. See example below. Not all pins support all properties so either refer to the NXP 1850/4350 user manual or the pin table in the pinctrl-lpc18xx driver for supported pin properties. Example: pinctrl: pinctrl@40086000 { compatible = "nxp,lpc1850-scu"; reg = <0x40086000 0x1000>; clocks = <&ccu1 CLK_CPU_SCU>; i2c0_pins: i2c0-pins { i2c0_pins_cfg { pins = "i2c0_scl", "i2c0_sda"; function = "i2c0"; input-enable; }; }; uart0_pins: uart0-pins { uart0_rx_cfg { pins = "pf_11"; function = "uart0"; bias-disable; input-enable; }; uart0_tx_cfg { pins = "pf_10"; function = "uart0"; bias-disable; }; }; gpio_joystick_pins: gpio-joystick-pins { gpio_joystick_1_cfg { pins = "p9_0"; function = "gpio"; nxp,gpio-pin-interrupt = <0>; input-enable; bias-disable; }; }; }; |