Documentation / devicetree / bindings / spi / cavium,octeon-3010-spi.yaml


Based on kernel version 7.3. Page generated on 2026-10-19 13:17 EDT.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/cavium,octeon-3010-spi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Cavium, Inc. OCTEON SoC SPI master controller

description:
  The Cavium OCTEON SPI controller is an SPI master controller found in
  OCTEON SoCs.

maintainers:
  - Rob Herring <robh@kernel.org>

allOf:
  - $ref: spi-controller.yaml#

properties:
  compatible:
    const: cavium,octeon-3010-spi

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts

unevaluatedProperties: false

examples:
  - |
    soc {
        #address-cells = <2>;
        #size-cells = <2>;
 
        spi@1070000001000 {
            compatible = "cavium,octeon-3010-spi";
            reg = <0x10700 0x00001000 0x0 0x100>;
            interrupts = <0 58>;
            #address-cells = <1>;
            #size-cells = <0>;
 
            eeprom@0 {
                compatible = "st,m95256", "atmel,at25";
                reg = <0>;
                spi-max-frequency = <5000000>;
                spi-cpha;
                spi-cpol;
                pagesize = <64>;
                size = <32768>;
                address-width = <16>;
            };
        };
    };
...