Documentation / devicetree / bindings / spi / xlnx,zynq-qspi.yaml


Based on kernel version 6.10. Page generated on 2024-07-16 09:00 EST.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/xlnx,zynq-qspi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Xilinx Zynq QSPI controller

description:
  The Xilinx Zynq QSPI controller is used to access multi-bit serial flash
  memory devices.

allOf:
  - $ref: spi-controller.yaml#

maintainers:
  - Michal Simek <michal.simek@amd.com>

# Everything else is described in the common file
properties:
  compatible:
    const: xlnx,zynq-qspi-1.0

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: reference clock
      - description: peripheral clock

  clock-names:
    items:
      - const: ref_clk
      - const: pclk

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

unevaluatedProperties: false

examples:
  - |
    spi@e000d000 {
        compatible = "xlnx,zynq-qspi-1.0";
        reg = <0xe000d000 0x1000>;
        interrupt-parent = <&intc>;
        interrupts = <0 19 4>;
        clock-names = "ref_clk", "pclk";
        clocks = <&clkc 10>, <&clkc 43>;
        num-cs = <1>;
    };