Based on kernel version 7.0. Page generated on 2026-04-23 09:49 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/spi/nxp,imx94-xspi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: NXP External Serial Peripheral Interface (xSPI) maintainers: - Haibo Chen <haibo.chen@nxp.com> - Han Xu <han.xu@nxp.com> properties: compatible: oneOf: - enum: - nxp,imx94-xspi - items: - enum: - nxp,imx952-xspi - const: nxp,imx94-xspi reg: items: - description: registers address space - description: memory mapped address space reg-names: items: - const: base - const: mmap interrupts: items: - description: interrupt for EENV0 - description: interrupt for EENV1 - description: interrupt for EENV2 - description: interrupt for EENV3 - description: interrupt for EENV4 clocks: items: - description: SPI serial clock clock-names: items: - const: per required: - compatible - reg - reg-names - interrupts - clocks - clock-names allOf: - $ref: spi-controller.yaml# unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> soc { #address-cells = <2>; #size-cells = <2>; spi@42b90000 { compatible = "nxp,imx94-xspi"; reg = <0x0 0x42b90000 0x0 0x50000>, <0x0 0x28000000 0x0 0x08000000>; reg-names = "base", "mmap"; interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&scmi_1>; clock-names = "per"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <200000000>; spi-rx-bus-width = <8>; spi-tx-bus-width = <8>; }; }; }; |