Documentation / devicetree / bindings / spi / fsl-imx-cspi.yaml


Based on kernel version 6.10. Page generated on 2024-07-16 09:00 EST.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/fsl-imx-cspi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale (Enhanced) Configurable Serial Peripheral Interface (CSPI/eCSPI) for i.MX

maintainers:
  - Shawn Guo <shawnguo@kernel.org>

allOf:
  - $ref: /schemas/spi/spi-controller.yaml#

properties:
  compatible:
    oneOf:
      - const: fsl,imx1-cspi
      - const: fsl,imx21-cspi
      - const: fsl,imx27-cspi
      - const: fsl,imx31-cspi
      - const: fsl,imx35-cspi
      - const: fsl,imx51-ecspi
      - const: fsl,imx53-ecspi
      - items:
          - enum:
              - fsl,imx25-cspi
              - fsl,imx50-cspi
              - fsl,imx51-cspi
              - fsl,imx53-cspi
          - const: fsl,imx35-cspi
      - items:
          - const: fsl,imx8mp-ecspi
          - const: fsl,imx6ul-ecspi
      - items:
          - enum:
              - fsl,imx50-ecspi
              - fsl,imx6q-ecspi
              - fsl,imx6sx-ecspi
              - fsl,imx6sl-ecspi
              - fsl,imx6sll-ecspi
              - fsl,imx6ul-ecspi
              - fsl,imx7d-ecspi
              - fsl,imx8mq-ecspi
              - fsl,imx8mm-ecspi
              - fsl,imx8mn-ecspi
          - const: fsl,imx51-ecspi

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: SoC SPI ipg clock
      - description: SoC SPI per clock

  clock-names:
    items:
      - const: ipg
      - const: per

  dmas:
    items:
      - description: DMA controller phandle and request line for RX
      - description: DMA controller phandle and request line for TX

  dma-names:
    items:
      - const: rx
      - const: tx

  fsl,spi-rdy-drctl:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: |
      Integer, representing the value of DRCTL, the register controlling
      the SPI_READY handling. Note that to enable the DRCTL consideration,
      the SPI_READY mode-flag needs to be set too.
      Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
    enum: [0, 1, 2]

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/imx5-clock.h>
 
    spi@70010000 {
        #address-cells = <1>;
        #size-cells = <0>;
        compatible = "fsl,imx51-ecspi";
        reg = <0x70010000 0x4000>;
        interrupts = <36>;
        clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>,
                 <&clks IMX5_CLK_ECSPI1_PER_GATE>;
        clock-names = "ipg", "per";
    };