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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # Copyright 2019 BayLibre, SAS %YAML 1.2 --- $id: http://devicetree.org/schemas/spi/amlogic,meson6-spifc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Amlogic Meson SPI Flash Controller maintainers: - Neil Armstrong <neil.armstrong@linaro.org> allOf: - $ref: spi-controller.yaml# description: | The Meson SPIFC is a controller optimized for communication with SPI NOR memories, without DMA support and a 64-byte unified transmit / receive buffer. properties: compatible: enum: - amlogic,meson6-spifc # SPI Flash Controller on Meson6 and compatible SoCs - amlogic,meson-gxbb-spifc # SPI Flash Controller on GXBB and compatible SoCs reg: maxItems: 1 clocks: maxItems: 1 required: - compatible - reg - clocks unevaluatedProperties: false examples: - | spi@c1108c80 { compatible = "amlogic,meson6-spifc"; reg = <0xc1108c80 0x80>; clocks = <&clk81>; #address-cells = <1>; #size-cells = <0>; flash: flash@0 { compatible = "spansion,m25p80", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <40000000>; }; }; |