Based on kernel version 6.13
. Page generated on 2025-01-21 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/spi/mediatek,spi-slave-mt27xx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: SPI Slave controller for MediaTek ARM SoCs maintainers: - Leilk Liu <leilk.liu@mediatek.com> allOf: - $ref: /schemas/spi/spi-controller.yaml# properties: compatible: enum: - mediatek,mt2712-spi-slave - mediatek,mt8195-spi-slave reg: maxItems: 1 interrupts: maxItems: 1 clocks: maxItems: 1 clock-names: items: - const: spi required: - compatible - reg - interrupts - clocks - clock-names unevaluatedProperties: false examples: - | #include <dt-bindings/clock/mt2712-clk.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> spi@10013000 { compatible = "mediatek,mt2712-spi-slave"; reg = <0x10013000 0x100>; interrupts = <GIC_SPI 283 IRQ_TYPE_LEVEL_LOW>; clocks = <&infracfg CLK_INFRA_AO_SPI1>; clock-names = "spi"; assigned-clocks = <&topckgen CLK_TOP_SPISLV_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>; }; |