Based on kernel version 6.15
. Page generated on 2025-05-29 09:09 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/spi/fsl,spi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Freescale SPI (Serial Peripheral Interface) controller maintainers: - J. Neuschäfer <j.ne@posteo.net> properties: compatible: enum: - fsl,spi - aeroflexgaisler,spictrl reg: maxItems: 1 cell-index: $ref: /schemas/types.yaml#/definitions/uint32 description: | QE SPI subblock index. 0: QE subblock SPI1 1: QE subblock SPI2 mode: description: SPI operation mode enum: - cpu - cpu-qe interrupts: maxItems: 1 clock-frequency: description: input clock frequency to non FSL_SOC cores cs-gpios: true fsl,spisel_boot: $ref: /schemas/types.yaml#/definitions/flag description: For the MPC8306 and MPC8309, specifies that the SPISEL_BOOT signal is used as chip select for a slave device. Use reg = <number of gpios> in the corresponding child node, i.e. 0 if the cs-gpios property is not present. required: - compatible - reg - mode - interrupts allOf: - $ref: spi-controller.yaml# unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/irq.h> spi@4c0 { compatible = "fsl,spi"; reg = <0x4c0 0x40>; cell-index = <0>; interrupts = <82 0>; mode = "cpu"; cs-gpios = <&gpio 18 IRQ_TYPE_EDGE_RISING // device reg=<0> &gpio 19 IRQ_TYPE_EDGE_RISING>; // device reg=<1> }; ... |