Documentation / devicetree / bindings / spi / spi-rockchip.yaml


Based on kernel version 6.10. Page generated on 2024-07-16 09:00 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip SPI Controller

description:
  The Rockchip SPI controller is used to interface with various devices such
  as flash and display controllers using the SPI communication interface.

allOf:
  - $ref: spi-controller.yaml#

maintainers:
  - Heiko Stuebner <heiko@sntech.de>

# Everything else is described in the common file
properties:
  compatible:
    oneOf:
      - const: rockchip,rk3036-spi
      - const: rockchip,rk3066-spi
      - const: rockchip,rk3228-spi
      - const: rockchip,rv1108-spi
      - items:
          - enum:
              - rockchip,px30-spi
              - rockchip,rk3128-spi
              - rockchip,rk3188-spi
              - rockchip,rk3288-spi
              - rockchip,rk3308-spi
              - rockchip,rk3328-spi
              - rockchip,rk3368-spi
              - rockchip,rk3399-spi
              - rockchip,rk3568-spi
              - rockchip,rk3588-spi
              - rockchip,rv1126-spi
          - const: rockchip,rk3066-spi

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: transfer-clock
      - description: peripheral clock

  clock-names:
    items:
      - const: spiclk
      - const: apb_pclk

  dmas:
    items:
      - description: TX DMA Channel
      - description: RX DMA Channel

  dma-names:
    items:
      - const: tx
      - const: rx

  rx-sample-delay-ns:
    default: 0
    description:
      Nano seconds to delay after the SCLK edge before sampling Rx data
      (may need to be fine tuned for high capacitance lines).
      If not specified 0 will be used.

  pinctrl-names:
    minItems: 1
    items:
      - const: default
      - const: sleep
    description:
      Names for the pin configuration(s); may be "default" or "sleep",
      where the "sleep" configuration may describe the state
      the pins should be in during system suspend.

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/rk3188-cru-common.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    spi0: spi@ff110000 {
      compatible = "rockchip,rk3066-spi";
      reg = <0xff110000 0x1000>;
      interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
      clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
      clock-names = "spiclk", "apb_pclk";
      dmas = <&pdma1 11>, <&pdma1 12>;
      dma-names = "tx", "rx";
      pinctrl-0 = <&spi1_pins>;
      pinctrl-1 = <&spi1_sleep>;
      pinctrl-names = "default", "sleep";
      rx-sample-delay-ns = <10>;
      #address-cells = <1>;
      #size-cells = <0>;
    };