Documentation / devicetree / bindings / spi / spi-fsl-lpspi.yaml


Based on kernel version 6.10. Page generated on 2024-07-16 09:00 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale Low Power SPI (LPSPI) for i.MX

maintainers:
  - Anson Huang <Anson.Huang@nxp.com>

allOf:
  - $ref: /schemas/spi/spi-controller.yaml#

properties:
  compatible:
    oneOf:
      - enum:
          - fsl,imx7ulp-spi
          - fsl,imx8qxp-spi
      - items:
          - enum:
              - fsl,imx8ulp-spi
              - fsl,imx93-spi
              - fsl,imx95-spi
          - const: fsl,imx7ulp-spi
  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: SoC SPI per clock
      - description: SoC SPI ipg clock

  clock-names:
    items:
      - const: per
      - const: ipg

  dmas:
    items:
      - description: TX DMA Channel
      - description: RX DMA Channel

  dma-names:
    items:
      - const: tx
      - const: rx

  fsl,spi-only-use-cs1-sel:
    description:
      spi common code does not support use of CS signals discontinuously.
      i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
      this property to re-config the chipselect value in the LPSPI driver.
    type: boolean

  num-cs:
    description:
      number of chip selects.
    minimum: 1
    maximum: 2
    default: 1

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/imx7ulp-clock.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
 
    spi@40290000 {
        compatible = "fsl,imx7ulp-spi";
        reg = <0x40290000 0x10000>;
        interrupt-parent = <&intc>;
        interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&clks IMX7ULP_CLK_LPSPI2>,
                 <&clks IMX7ULP_CLK_DUMMY>;
        clock-names = "per", "ipg";
        spi-slave;
        fsl,spi-only-use-cs1-sel;
        num-cs = <2>;
    };