Based on kernel version 6.12.4
. Page generated on 2024-12-12 21:01 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/spi/socionext,synquacer-spi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Socionext SynQuacer HS-SPI Controller maintainers: - Masahisa Kojima <masahisa.kojima@linaro.org> - Jassi Brar <jaswinder.singh@linaro.org> allOf: - $ref: spi-controller.yaml# properties: compatible: const: socionext,synquacer-spi reg: maxItems: 1 clocks: minItems: 1 items: - description: core clock - description: rate clock clock-names: minItems: 1 items: - const: iHCLK - const: iPCLK interrupts: items: - description: Receive Interrupt - description: Transmit Interrupt - description: Fault Interrupt socionext,use-rtm: type: boolean description: Enable using "retimed clock" for RX socionext,set-aces: type: boolean description: Enable same active clock edges field to be set required: - compatible - reg - interrupts - clocks - clock-names unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> spi@ff110000 { compatible = "socionext,synquacer-spi"; reg = <0xff110000 0x1000>; interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_hsspi>; clock-names = "iHCLK"; socionext,use-rtm; socionext,set-aces; }; ... |